Informations principales

Physical Design Engineer

Poste: Non spécifié

Début: Dès que possible

End: Non spécifié

Lieu: San Diego, États-Unis

Type de collaboration: Projet seulement

Taux horaire: Non spécifié

Dernière mise à jour: 2 avr. 2024

Description et exigences de la tâche

Job Description:
You will be part of a team responsible for the complete Physical Design Flow of Mobile Station Modem (MSM), Mobile Data Modem (MDM), and Cell Site Modem (CSM) chips. You will also perform the following tasks:

  • Work with the RTL design team to understand physical design timing closures, including the development of timing constraints required for implementation
  • Assist the DFT team in understanding DFT techniques for physical design timing closure
  • Lead core and top-level timing closure activities
  • Develop new scripts and flows to improve the timing closure process
  • Complete physical implementation of cores (i.e. graphics, video, multimedia, processor, Double Data Rate (DDR), and more)
  • Enable low power implementation methods
  • Core and top-level floor planning, placement, CTS, P&R, PV, and signal integrity analysis
  • Develop high-speed customized logic cells
Work Location:
San Diego, California or San Jose, California

  • Experience and knowledge of tools for CPU and GPU physical design implementation (Floorplanning, CTS, P&R, STA) in advanced technologies like 45nm and 28nm CMOS
  • Programming and scripting skills (Tcl, Perl, and/or C language)
  • Strong verbal and written communication skills
  • Additional expertise in one or more of the following areas:
    • STA tool and timing closure methodologies
    • Developing and implementing timing engineering change orders (ECOs), which includes the effect on congestion, routing, and power
    • Power grid, clock tree, and low-power reduction implementation methods
    • Signal integrity and timing closure issues such as on-chip variation (OCV), advanced OCV (AOCV), and statistical timing
    • Floorplanning
    • Placement
    • CTS
    • P&R
    • Physical verification
    • CLP
    • IR drop analysis
    • Formal verification


Engineering science